HDI Currents

The current draws using benchtop supplies are listed below. These are with CLOCK A enabled and CLOCK B disabled. The voltages were set using the senselines (AVDD=5 V, AVDD2=2.2V, DVDD=5V). The measurement accuracy is of order 10 mA.

Before bonding to silicon, benchtop power supplies.

HDI

Side

DVDD

AVDD

AVDD2

H1-13

n

420 mA

320 mA

120 mA

H1-13

p

440 mA

320 mA

120 mA

H1-29

n

480 mA

350 mA

110 mA

H1-29

p

470 mA

330 mA

110 mA



The currents after bonding to the silicon for HDI H1-29 (DFA D02F-4) using the benchtop supplies, were consistent with the values before bonding.

HDI H1-13, (DFA D02B-8) after bonding to the silicon, was used during some of the tests of the new CAEN power supply module. The CAEN supply measures the currents with an accuracy of order 1 mA. The tables below give the measured currents for when the chip is idle and during a calibration run. Note that the DVDD current drops about 70 mA during a calibration run, while the analog currents remain the same. A similar drop was observed with HDI H1-29 (DFA D02F-4).

After bonding to silicon, CAEN supply, not during calibration run.

HDI / DFA

Side

DVDD

AVDD

AVDD2

H1-13 / D02B-8

n

461 mA

343 mA

105 mA

H1-13 / D02B-8

p

470 mA

330 mA

124 mA

After bonding to silicon, CAEN supply, during calibration run.

HDI / DFA

Side

DVDD

AVDD

AVDD2

H1-13 / D02B-8

n

392 mA

342 mA

105 mA

H1-13 / D02B-8

p

398 mA

330 mA

123 mA

Chip 3 on HDI H1-13, which is on the n-side, stopped responding to charge injection after it was bonded to the silicon. The n-side AVDD2 current is lower than the p-side AVDD2 current by 1/7th which may mean the AVDD2 bond on chip 3 came off sometime during the bonding stage. An inspection of the bond under the microscope was inconclusive. Before bonding to the silicon, AVDD2 was drawing 120 mA from the benchtop supplies on both the n-side and p-side, although this current measurement only had an accuracy of 10 mA.


Silicon Currents

The table below gives the operating voltage, p-side bias current, and p-side edge guard current for the two detectors. Typically, a Layer 2 DFA will draw from 1 to 2 uA on both the bias and the edge guard. However, the currents for DFA D02F-4, which is connected to HDI H1-29, are unstable. The detector initially drew 6.3 uA and 5.6 uA for the p-side bias and edge guard respectively. After about a half hour at 40 V, the currents were above 50 uA.


Detector Voltage Bias-p Current Guard-p Current
D02B-8 (H1-13)

40 V

1.3 uA

1.1 uA

D02F-4 (H1-29)

40 V

From 6 uA to 80 uA

From 6 uA to 80 uA


The silicon currents given above were the currents measured with the detectors in the ringframe. When we retested the detectors in the commissioning box, we noted a change in currents for D02B-8. While the total current was about the same, we found that the current had redistributed itself and most of the current was flowing through the guard line. The tests in the commissioning box and the tests in the ringframe used a different set of cables and a different matching card. A dependence of the current sharing between bias and guard line on the exact values of the resistors mounted on the matching card had already been seen on the old "3x3" protoype. It is possible that the differences in current sharing between the two setups was due to differences in the values of the resistors mounted on the two matching cards; however, we have not yet gotten around to measuring the values of the resistors on the two cards.

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